MJ

Michael C. Stephens, Jr.

I1 Iii Holdings 12: 16 patents #5 of 264Top 2%
AT AT&T: 12 patents #1,455 of 18,772Top 8%
VS Vanguard International Semiconductor: 11 patents #52 of 585Top 9%
TI Texas Instruments: 6 patents #2,401 of 12,488Top 20%
AS Alliance Semiconductor: 5 patents #8 of 32Top 25%
Cypress Semiconductor: 3 patents #568 of 1,852Top 35%
📍 Los Gatos, CA: #85 of 2,986 inventorsTop 3%
🗺 California: #4,640 of 386,348 inventorsTop 2%
Overall (All Time): #30,931 of 4,157,543Top 1%
68
Patents All Time

Issued Patents All Time

Showing 26–50 of 68 patents

Patent #TitleCo-InventorsDate
9185569 Facilitation of self-adjusting network uplink noise balancing Arthur Richard Brisebois 2015-11-10
9153298 Latency adjustment based on stack position identifier in memory devices configured for stacked arrangements 2015-10-06
9153299 Valid command detection based on stack position identifiers in memory devices configured for stacked arrangements 2015-10-06
9058855 Pad selection in memory devices configured for stacked arrangements 2015-06-16
8971085 Self-refresh adjustment in memory devices configured for stacked arrangements 2015-03-03
8897053 Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements 2014-11-25
8891278 Stack position determination in memory devices configured for stacked arrangements 2014-11-18
8874127 Facilitation of self-adjusting network uplink noise balancing Arthur Richard Brisebois 2014-10-28
8743583 Internal supply redundancy across memory devices configured for stacked arrangements 2014-06-03
8730705 Serial searching in memory devices configured for stacked arrangements 2014-05-20
8681524 Supply adjustment in memory devices configured for stacked arrangements 2014-03-25
8659928 Valid command detection based on stack position identifiers in memory devices configured for stacked arrangements 2014-02-25
8614909 Internal supply testing in memory devices configured for stacked arrangements 2013-12-24
8599595 Memory devices with serially connected signals for stacked arrangements 2013-12-03
8564999 Pad selection in memory devices configured for stacked arrangements 2013-10-22
8565029 Supply adjustment in memory devices configured for stacked arrangements 2013-10-22
8559258 Self-refresh adjustment in memory devices configured for stacked arrangements 2013-10-15
7117300 Method and apparatus for restricted search operation in content addressable memory (CAM) devices David V. James, Jagadeesan Rajamanickam 2006-10-03
7102421 Dynamically adjustable on-chip supply voltage generation Luigi Ternullo, Jr. 2006-09-05
6988164 Compare circuit and method for content addressable memory (CAM) device Sanlay M. Wanzakhade 2006-01-17
6954823 Search engine device and method for generating output search responses from multiple input search responses David V. James, Jagadeesan Rajamanickam, Sanjay M. Wanzakhade 2005-10-11
6845024 Result compare circuit and method for content addressable memory (CAM) device Sanjay M. Wanzakhade, Jagadeesan Rajamanickam, David V. James 2005-01-18
6764867 Reticle option layer detection method Christopher Ematrudo, Jeffrey Earl 2004-07-20
6246619 Self-refresh test time reduction scheme Christopher Ematrudo, Jeffrey Earl, Luigi Ternullo, Jr., Michael F. Vincent 2001-06-12
6208197 Internal charge pump voltage limit control Luigi Ternullo, Jr. 2001-03-27