Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10616103 | Constructing staging trees in hierarchical circuit designs | Harald D. Folberth, Sven Peyer | 2020-04-07 |
| 10146899 | Clock control trees | Harald D. Folberth | 2018-12-04 |
SN
Sven Nitzsche
Overall (All Time): #1,904,186 of 4,157,543Top 50%
2
Patents All Time