| 12260159 |
System for collaborative hardware RTL logic timing debug in integrated circuit designs |
Arun Joseph, Wolfgang Roesner, Sampath Goud Baddam, Anthony Saporito, Matthias Klein |
2025-03-25 |
| 11645193 |
Heterogeneous services for enabling collaborative logic design and debug in aspect oriented hardware designing |
Arun Joseph, Wolfgang Roesner, Anthony Saporito, Matthias Klein, Sampath Goud Baddam |
2023-05-09 |
| 11276418 |
Acoustic signature generation by embedding user sentiments |
Diwesh Pandey, Arun Joseph, Shiladitya Ghosh |
2022-03-15 |
| 11036905 |
Hierarchical power analysis using improved activity abstraction and capacitance abstraction by accounting for design heterogeneity extremities |
Arun Joseph, Spandana V. Rachamalla, Rahul M. Rao |
2021-06-15 |
| 10996074 |
Activity recommendation based on a real-time mapping between activity characteristics and autonomous vehicle dynamics |
Diwesh Pandey, Shiladitya Ghosh, Arun Joseph, Anand Haridass |
2021-05-04 |
