RI

Robert Neal Carlton Broberg, III

IBM: 6 patents #16,453 of 70,183Top 25%
LS Lsi: 4 patents #338 of 1,740Top 20%
Lsi Logic: 3 patents #574 of 1,957Top 30%
📍 Rochester, MN: #452 of 3,042 inventorsTop 15%
🗺 Minnesota: #5,782 of 52,454 inventorsTop 15%
Overall (All Time): #385,814 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
8156454 Virtual data representation through selective bidirectional translation George Wayne Nation 2012-04-10
7584460 Process and apparatus for abstracting IC design files John C. Reddersen, Judy M. Gehman 2009-09-01
7434180 Virtual data representation through selective bidirectional translation George Wayne Nation 2008-10-07
7430725 Suite of tools to design integrated circuits Jonathan Byrn, Gary S. Delp, Michael K. Eneboe, Gary McClannahan, George Wayne Nation +3 more 2008-09-30
7149218 Cache line cut through of limited life data in a data processing system Chad B. McBride, Jonathan Byrn, Gary McClannahan 2006-12-12
7055113 Simplified process to design integrated circuits Jonathan Byrn, Gary S. Delp, Michael K. Eneboe, Gary McClannahan, George Wayne Nation +3 more 2006-05-30
7017093 Circuit and/or method for automated use of unallocated resources for a trace buffer application 2006-03-21
6959428 Designing and testing the interconnection of addressable devices of integrated circuits Troy Evan Faber, Gary S. Delp, Paul Gary Reuland, Daniel James Murray 2005-10-25
6658519 Bus bridge with embedded input/output (I/O) and transaction tracing capabilities Paul B. Kubista, Daniel F. Moertl, Daniel Paul Wetzel 2003-12-02
6601122 Exceptions and interrupts with dynamic priority and vector routing Jonathan Byrn, Chad B. McBride, Gary McClannahan 2003-07-29
6453366 Method and apparatus for direct memory access (DMA) with dataflow blocking for users Jonathan Byrn, Chad B. McBride, Gary McClannahan 2002-09-17
6381648 Method and apparatus for filtering ethernet frames Paul B. Kubista, Gerald D. Miller 2002-04-30
6289430 Method and apparatus for target addressing and translation in a non-uniform memory environment with user defined target tags Jonathan Byrn, Chad B. McBride, Gary McClannahan 2001-09-11