Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8881153 | Speculative thread execution with hardware transactional memory | Mark E. Giampapa, Thomas M. Gooding, Kai-Ting Amy Wang, Peng Wu, Xiaotong Zhuang | 2014-11-04 |
| 8640113 | setjmp/longjmp for speculative execution frameworks | Kai-Ting Amy Wang, Peng Wu, Mark Yamashita, Xiaotong Zhuang | 2014-01-28 |
| 8527962 | Promotion of a child procedure in heterogeneous architecture software | Ettore Tiotto, Guansong Zhang | 2013-09-03 |
| 8484630 | Code motion based on live ranges in an optimizing compiler | Shimin Cui | 2013-07-09 |
| 8438568 | Speculative thread execution with hardware transactional memory | Mark E. Giampapa, Thomas M. Gooding, Kai-Ting Amy Wang, Peng Wu, Xiaotong Zhuang | 2013-05-07 |
| 8423750 | Hardware assist thread for increasing code parallelism | Ronald P. Hall, Hung Q. Le, Balaram Sinharoy | 2013-04-16 |
| 8375375 | Auto parallelization of zero-trip loops through the induction variable substitution | Zhixing Ren, Guansong Zhang | 2013-02-12 |
| 8352684 | Optimal cache replacement scheme using a training operation | Roch G. Archambault, Shimin Cui, Chen Ding, Yaoqing Gao, Xiaoming Gu +1 more | 2013-01-08 |
| 8341615 | Single instruction multiple data (SIMD) code generation for parallel loops using versioning and scheduling | Alexandre E. Eichenberger, Amy K. Wang, Guansong Zhang | 2012-12-25 |
| 8332833 | Procedure control descriptor-based code specialization for context sensitive memory disambiguation | Roch G. Archambault, Shimin Cui, Yaoqing Gao, Peng Zhao | 2012-12-11 |
| 8191057 | Systems, methods, and computer products for compiler support for aggressive safe load speculation | Roch G. Archambault, Geoffrey Owen Blandy, Roland Froese, Yaoqing Gao, Liangxiao Hu +1 more | 2012-05-29 |
| 8161464 | Compiling source code | Roch G. Archambault, Shimin Cui, Yaoqing Gao | 2012-04-17 |
| 8146070 | Method and apparatus for optimizing software program using inter-procedural strength reduction | Roch G. Archambault, Shimin Cui | 2012-03-27 |
| 8146071 | Pipelined parallelization of multi-dimensional loops with multiple data dependencies | Priya Unnikrishnan | 2012-03-27 |
| 8117604 | Architecture cloning for power PC processors | Roch G. Archambault, Edwin Chan | 2012-02-14 |
| 8104030 | Mechanism to restrict parallelization of loops | Priya Unnikrishnan, Guansong Zhang | 2012-01-24 |
| 8091079 | Implementing shadow versioning to improve data dependence analysis for instruction scheduling | Roch G. Archambault, Yaoqing Gao, Peng Zhao | 2012-01-03 |
| 8056066 | Method and apparatus for address taken refinement using control flow information | Edwin Chan | 2011-11-08 |
| 8037462 | Framework for parallelizing general reduction | Roch G. Archambault, Yaoqing Gao, Zhixing Ren | 2011-10-11 |
| 8015556 | Efficient method of data reshaping for multidimensional dynamic array objects in the presence of multiple object instantiations | Shimin Cui | 2011-09-06 |
| 7856627 | Method of SIMD-ization through data reshaping, padding, and alignment | Roch G. Archambault, Shimin Cui, Yaoqing Gao | 2010-12-21 |
| 7856628 | Method for simplifying compiler-generated software code | Huiwen Li | 2010-12-21 |
| 7555748 | Method and apparatus for improving data cache performance using inter-procedural strength reduction of global objects | Roch G. Archambault, Shimin Cui, Yaoqing Gao | 2009-06-30 |
| 7487497 | Method and system for auto parallelization of zero-trip loops through induction variable substitution | Zhixing Ren, Guansong Zhang | 2009-02-03 |
| 7487501 | Distributed counter and centralized sensor in barrier wait synchronization | Kevin A. Stoodley, Guansong Zhang | 2009-02-03 |