Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4542340 | Testing method and structure for leakage current characterization in the manufacture of dynamic RAM cells | Satya N. Chakravarti, Donald A. Miller | 1985-09-17 |
| 4498095 | Semiconductor structure with improved isolation between two layers of polycrystalline silicon | Stanley R. Makarewicz, Joseph F. Shepard, Jr. | 1985-02-05 |
| 4409722 | Borderless diffusion contact process and structure | Robert Charles Dockerty | 1983-10-18 |
| 4407058 | Method of making dense vertical FET's | Joseph J. Fatula, Jr., Joseph F. Shepard, Jr. | 1983-10-04 |
| 4397075 | FET Memory cell structure and process | Joseph J. Fatula, Jr. | 1983-08-09 |
| 4341009 | Method for making an electrical contact to a silicon substrate through a relatively thin layer of silicon dioxide on the surface of the substrate | Robert F. Bartholomew, James R. Gardiner, Martin Revitz, Joseph F. Shepard, Jr. | 1982-07-27 |
| 4251571 | Method for forming semiconductor structure with improved isolation between two layers of polycrystalline silicon | Stanley R. Makarewicz, Joseph F. Shepard, Jr. | 1981-02-17 |
| 4191603 | Making semiconductor structure with improved phosphosilicate glass isolation | Martin Revitz, Joseph F. Shepard, Jr. | 1980-03-04 |