Issued Patents All Time
Showing 51–74 of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8219995 | Capturing hardware statistics for partitions to enable dispatching and scheduling efficiency | Diane G. Flemming, Octavian F. Herescu, William A. Maron | 2012-07-10 |
| 8146087 | System and method for enabling micro-partitioning in a multi-threaded processor | Men-Chow Chiang, Sujatha Kashyap | 2012-03-27 |
| 8104036 | Measuring processor use in a hardware multithreading processor environment | Bret R. Olszewski, Luc Rene Smolders | 2012-01-24 |
| 7962677 | Bus access moderation system | William A. Maron, Diane G. Flemming, Ghadir Robert Gholami, Octavian F. Herescu | 2011-06-14 |
| 7962913 | Scheduling threads in a multiprocessor computer | Jos Manuel Accapadi, Mathew Accapadi, Andrew Dunshea, Mark Elliott Hack, Agustin Mena, III | 2011-06-14 |
| 7711905 | Method and system for using upper cache history information to improve lower cache data replacement | Diane G. Flemming, Octavian F. Herescu, William A. Maron | 2010-05-04 |
| 7698707 | Scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval | Jos Manuel Accapadi, Andrew Dunshea, Dirk Michel | 2010-04-13 |
| 7698530 | Workload management in virtualized data processing environment | Diane G. Flemming, Octavian F. Herescu, William A. Maron | 2010-04-13 |
| 7698531 | Workload management in virtualized data processing environment | Diane G. Flemming, Octavian F. Herescu, William A. Maron | 2010-04-13 |
| 7676808 | System and method for CPI load balancing in SMT processors | Jos Manuel Accapadi, Andrew Dunshea, Dirk Michel | 2010-03-09 |
| 7640400 | Programmable data prefetching | William A. Maron, Greg R. Mewhinney, David B. Whitworth | 2009-12-29 |
| 7617375 | Workload management in virtualized data processing environment | Diane G. Flemming, Octavian F. Herescu, William A. Maron | 2009-11-10 |
| 7555753 | Measuring processor use in a hardware multithreading processor environment | Bret R. Olszewski, Luc Rene Smolders | 2009-06-30 |
| 7487503 | Scheduling threads in a multiprocessor computer | Jos Manuel Accapadi, Mathew Accapadi, Andrew Dunshea, Mark Elliott Hack, Agustin Mena, III | 2009-02-03 |
| 7454570 | Efficient memory update process for on-the-fly instruction translation for well behaved applications executing on a weakly-ordered processor | Andrew Dunshea, Satya P. Sharma | 2008-11-18 |
| 7448036 | System and method for thread scheduling with weak preemption policy | Larry Bert Brenner, James William Van Fleet | 2008-11-04 |
| 7360218 | System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval | Jos Manuel Accapadi, Andrew Dunshea, Dirk Michel | 2008-04-15 |
| 7353517 | System and method for CPI load balancing in SMT processors | Jos Manuel Accapadi, Andrew Dunshea, Dirk Michel | 2008-04-01 |
| 7318142 | System and method for dynamically adjusting read ahead values based upon memory usage | Jos Manuel Accapadi, Andrew Dunshea, Li Li, Grover H. Neuman, David Alan Hepkin | 2008-01-08 |
| 7231504 | Dynamic memory management of unallocated memory in a logical partitioned data processing system | Sujatha Kashyap | 2007-06-12 |
| 7120753 | System and method for dynamically adjusting read ahead values based upon memory usage | Jos Manuel Accapadi, Andrew Dunshea, Li Li, Grover H. Neuman, David Alan Hepkin | 2006-10-10 |
| 6845504 | Method and system for managing lock contention in a computer system | Hong Hua, Bret R. Olszewski, Nasr-Eddine Walehiane | 2005-01-18 |
| 6735769 | Apparatus and method for initial load balancing in a multiple run queue system | Larry Bert Brenner, Luke Matthew Browning, James VanFleet | 2004-05-11 |
| 6651146 | Method and apparatus for managing access contention to a linear list without the use of locks | James VanFleet, David B. Whitworth | 2003-11-18 |