Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6237128 | Method and apparatus for enabling parallel layout checking of designing VLSI-chips | Harald D. Folberth, Joachim Keinert, Jürgen Koehl, Oliver Rettig | 2001-05-22 |
| 4890238 | Method for physical VLSI-chip design | Klaus Klein, Helmut Schettler, Uwe Schulz, Otto Wagner, Rainer Zuehlke | 1989-12-26 |
| 4437022 | Monolithically integrated push-pull driver | Eddehard F. Miersch, Helmut Schettler, Rainer Zuhlke | 1984-03-13 |