Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6237128 | Method and apparatus for enabling parallel layout checking of designing VLSI-chips | Harald D. Folberth, Joachim Keinert, Kurt Pollmann, Oliver Rettig | 2001-05-22 |
JK
Jürgen Koehl
Overall (All Time): #3,582,948 of 4,157,543Top 90%
1
Patents All Time