Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5982189 | Built-in dynamic stress for integrated circuits | Franco Motika, Phil Nigh | 1999-11-09 |
| 5983380 | Weighted random pattern built-in self-test | Franco Motika, Stephen V. Pateras | 1999-11-09 |
| 5930270 | Logic built in self-test diagnostic method | Donato O. Forlenza, Franco Motika, Phillip J. Nigh | 1999-07-27 |
| 4696005 | Apparatus for reducing test data storage requirements for high speed VLSI circuit testing | Ernest H. Millham, John J. Moser, Gary P. Visco | 1987-09-22 |