Issued Patents All Time
Showing 51–75 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7417480 | Duty cycle correction circuit whose operation is largely independent of operating voltage and process | David William Boerstler, Eskinder Hailu | 2008-08-26 |
| 7392419 | System and method automatically selecting intermediate power supply voltages for intermediate level shifters | David William Boerstler, Eskinder Hailu, Kazuhiko Miki | 2008-06-24 |
| 7391277 | Interleaved voltage controlled oscillator | David William Boerstler, Eskinder Hailu, Mike Shen | 2008-06-24 |
| 7363178 | Method and apparatus for measuring the relative duty cycle of a clock signal | David William Boerstler, Eskinder Hailu, Bin Wan | 2008-04-22 |
| 7358785 | Apparatus and method for extracting a maximum pulse width of a pulse width limiter | David William Boerstler, Eskinder Hailu | 2008-04-15 |
| 7360135 | Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance | David William Boerstler, Eskinder Hailu | 2008-04-15 |
| 7356716 | System and method for automatic calibration of a reference voltage | David William Boerstler, Eskinder Hailu | 2008-04-08 |
| 7350095 | Digital circuit to measure and/or correct duty cycles | David William Boerstler, Eskinder Hailu, Byron L. Krauter, Kazuhiko Miki | 2008-03-25 |
| 7333905 | Method and apparatus for measuring the duty cycle of a digital signal | David William Boerstler, Eskinder Hailu | 2008-02-19 |
| 7330061 | Method and apparatus for correcting the duty cycle of a digital signal | David William Boerstler, Eskinder Hailu | 2008-02-12 |
| 7322001 | Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance | David William Boerstler, Eskinder Hailu | 2008-01-22 |
| 7321651 | High frequency circuit capable of error detection and correction of code patterns running at full speed | David William Boerstler, Eskinder Hailu | 2008-01-22 |
| 7289926 | System and method for examining high-frequency clock-masking signal patterns at full speed | David William Boerstler, Eskinder Hailu | 2007-10-30 |
| 7265600 | Level shifter system and method to minimize duty cycle error due to voltage differences across power domains | David William Boerstler, Eskinder Hailu, Kazuhiko Miki | 2007-09-04 |
| 7260491 | Duty cycle measurement apparatus and method | David William Boerstler, Eskinder Hailu | 2007-08-21 |
| 7245161 | Apparatus and method for verifying glitch-free operation of a multiplexer | David William Boerstler, Eskinder Hailu | 2007-07-17 |
| 7245172 | Level shifter apparatus and method for minimizing duty cycle distortion | David William Boerstler, Eskinder Hailu, Kazuhiko Miki | 2007-07-17 |
| 7231479 | Round robin selection logic improves area efficiency and circuit speed | Glen Howard Handlogten, Peichun Peter Liu | 2007-06-12 |
| 7200064 | Apparatus and method for providing a reprogrammable electrically programmable fuse | David William Boerstler, Eskinder Hailu, Subramanian S. Iyer | 2007-04-03 |
| 7132896 | Circuit for minimizing filter capacitance leakage induced jitter in phase locked loops (PPLs) | David William Boerstler, Eskinder Hailu | 2006-11-07 |
| 7113881 | Method and apparatus for semi-automatic extraction and monitoring of diode ideality in a manufacturing environment | David William Boerstler, Eskinder Hailu | 2006-09-26 |
| 7030658 | Systems and methods for operating logic circuits | Hiroaki Murakami, Osamu Takahashi | 2006-04-18 |
| 7024445 | Method and apparatus for use in booth-encoded multiplication | — | 2006-04-04 |
| 6822486 | Multiplexer methods and apparatus | Matthew KING, Peichun Peter Liu, David Mui | 2004-11-23 |
| 6819141 | High speed, static digital multiplexer | Hung C. Ngo | 2004-11-16 |