Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7477608 | Methods for routing packets on a linear array of processors | Monty M. Denneau, Peter Hochschild, Richard A. Swetz | 2009-01-13 |
| 7203790 | Flexible techniques for associating cache memories with processors and main memory | Monty M. Denneau, Peter Hochschild | 2007-04-10 |
| 6961782 | Methods for routing packets on a linear array of processors | Monty M. Denneau, Peter Hochschild, Richard A. Swetz | 2005-11-01 |
| 6961804 | Flexible techniques for associating cache memories with processors and main memory | Monty M. Denneau, Peter Hochschild | 2005-11-01 |
| 6384833 | Method and parallelizing geometric processing in a graphics rendering pipeline | Monty M. Denneau, Peter Hochschild | 2002-05-07 |
| 5613080 | Multiple execution unit dispatch with instruction shifting between first and second instruction buffers based upon data dependency | David Scott Ray, Larry Edward Thatcher | 1997-03-18 |
| 4961141 | Generating efficient code for a computer with dissimilar register spaces | Martin E. Hopkins | 1990-10-02 |
| 4763255 | Method for generating short form instructions in an optimizing compiler | Martin E. Hopkins | 1988-08-09 |
| 4656582 | Generating storage reference instructions in an optimizing compiler | Gregory J. Chaitin, Martin E. Hopkins, Peter Markstein | 1987-04-07 |