| 9262170 |
Out-of-order checkpoint reclamation in a checkpoint processing and recovery core microarchitecture |
Anil Krishna, Ganesh Balakrishnan |
2016-02-16 |
| 8639886 |
Store-to-load forwarding mechanism for processor runahead mode operation |
Anil Krishna, Srinivasan Ramani |
2014-01-28 |
| 8572325 |
Dynamic adjustment of read/write ratio of a disk cache |
Ganesh Balakrishnan, Timothy H. Heil, MVV Anil Krishna, Brian M. Rogers |
2013-10-29 |
| 8543767 |
Prefetching with multiple processors and threads via a coherency bus |
Gordon Taylor Davis, Jeffrey H. Derby, Anil Krishna, Srinivasan Ramani, Ken V. Vu +1 more |
2013-09-24 |
| 8200905 |
Effective prefetching with multiple processors and threads |
Gordon Taylor Davis, Jeffrey H. Derby, Anil Krishna, Srinivasan Ramani, Ken V. Vu +1 more |
2012-06-12 |
| 8140758 |
Data reorganization in non-uniform cache access caches |
Ganesh Balakrishnan, Anil Krishna, Srinivasan Ramani |
2012-03-20 |
| 8140767 |
Cache management through delayed writeback |
Anil Krishna, Brian M. Rogers, Ken V. Vu |
2012-03-20 |
