Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11176293 | Method and system for emulation clock tree reduction | Dmitry Korchemny, Alexander Rabinovitch, Boris Gommershtadt, Srivatsan Raghavan | 2021-11-16 |
| 11106663 | Speeding matching search of hierarchical name structures | Ilya Kudryavtsev, Boris Gommershtadt | 2021-08-31 |
| 10796048 | Adding delay elements to enable mapping a time division multiplexing circuit on an FPGA of a hardware emulator | Nathaniel Azuelos, Alex Shot | 2020-10-06 |
| 10628625 | Incrementally distributing logical wires onto physical sockets by reducing critical path delay | Dmitriy Mosheyev, Richard Yachyang Sun, Yoon Kah Leow | 2020-04-21 |
| 10135901 | Exchange of content consumption-related information between networked devices | Keith Alan Rothschild, Slavisha Karach, Muhammad Asif Raza, Donald Carl Bleyl | 2018-11-20 |
| 9645913 | Method and apparatus for debugging programs | — | 2017-05-09 |
| 8489380 | Satisfiability (SAT) based bounded model checkers | Mark Ginzburg, Yoad Lustig, Ishai Rabinovotz, Ohad Shacham, Rachel Tzoref | 2013-07-16 |
| 8108195 | Satisfiability (SAT) based bounded model checkers | Mark Ginzburg, Yoad Lustig, Ishai Rabinovitz, Ohad Shacham, Rachel Tzoref | 2012-01-31 |
| 7835898 | Satisfiability (SAT) based bounded model checkers | Mark Ginzburg, Yoad Lustig, Ishai Rabinovitz, Ohad Shacham, Rachel Tzoref | 2010-11-16 |
| 7272752 | Method and system for integrating test coverage measurements with model based test generation | Eitan Farchi, Alan Hartman, Paul Kram, Kenneth Nagin, Yael Shaham-Gafni +1 more | 2007-09-18 |
| 7120568 | Identification of missing properties in model checking | Orna Grumberg, Sagi Katz | 2006-10-10 |
| 6629174 | Synchronization using bus arbitration control for system analysis | Monica Farkas, Raanan Gewirtzman, Karen Holtz | 2003-09-30 |