DM

Daniel F. Moertl

IBM: 136 patents #342 of 70,183Top 1%
📍 Rochester, MN: #13 of 3,042 inventorsTop 1%
🗺 Minnesota: #94 of 52,454 inventorsTop 1%
Overall (All Time): #7,621 of 4,157,543Top 1%
136
Patents All Time

Issued Patents All Time

Showing 76–100 of 136 patents

Patent #TitleCo-InventorsDate
8495258 Implementing storage adapter performance optimization with hardware accelerators offloading firmware for buffer allocation and automatically DMA Brian E. Bakke, Brian L. Bowles, Michael Joseph Carnevale, Robert Edward Galbraith, Adrian C. Gerhard +5 more 2013-07-23
8489946 Managing logically bad blocks in storage devices Robert Edward Galbraith, Adrian C. Gerhard 2013-07-16
8301942 Managing possibly logically bad blocks in storage devices Robert Edward Galbraith, Adrian C. Gerhard 2012-10-30
8234520 Wear leveling of solid state disks based on usage information of data and parity received from a raid controller Andrew D. Walls 2012-07-31
7783957 Apparatus for implementing enhanced vertical ECC storage in a dynamic random access memory Michael Joseph Carnevale, Steven B. Herndon 2010-08-24
7617377 Splitting endpoint address translation cache management responsibilities between a device driver and device driver services Renato J. Recio, Claudia A. Salzberg, Steven M. Thurber 2009-11-10
7590817 Communicating with an I/O device using a queue data structure and pre-translated addresses Renato J. Recio, Claudia A. Salzberg, Steven M. Thurber 2009-09-15
7587575 Communicating with a memory registration enabled adapter using cached address translations Renato J. Recio, Claudia A. Salzberg, Steven M. Thurber 2009-09-08
7558132 Implementing calibration of DQS sampling during synchronous DRAM reads Michael Joseph Carnevale 2009-07-07
7512143 Buffer management for a target channel adapter Michael Joseph Carnevale, Timothy J. Schimke 2009-03-31
7484030 Storage controller and methods for using the same Venkidesh K. Iyer 2009-01-27
7480197 Implementing calibration of DQS sampling during synchronous DRAM reads Michael Joseph Carnevale 2009-01-20
7451380 Method for implementing enhanced vertical ECC storage in a dynamic random access memory Michael Joseph Carnevale, Steven B. Herndon 2008-11-11
7370133 Storage controller and methods for using the same Venkidesh K. Iyer 2008-05-06
7266083 Method and apparatus for implementing queue pair connection protection over infiniband Michael Joseph Carnevale, Charles S. Graham, Brent William Jacobs, Timothy J. Schimke, Lee A. Sendelbach 2007-09-04
7225364 Method and apparatus for implementing infiniband receive function Michael Joseph Carnevale, Charles S. Graham, Timothy J. Schimke 2007-05-29
7212547 Method and apparatus for implementing global to local queue pair translation Michael Joseph Carnevale, Charles S. Graham, Timothy J. Schimke 2007-05-01
7133943 Method and apparatus for implementing receive queue for packet-based communications Michael Joseph Carnevale 2006-11-07
7024613 Method and apparatus for implementing infiniband transmit queue Michael Joseph Carnevale, Charles S. Graham, Timothy J. Schimke 2006-04-04
6985970 Data transfer with implicit notification Charles S. Graham, Brent William Jacobs, Timothy J. Schimke 2006-01-10
6963990 Clock generation for multiple secondary buses of a PCI bridge Jonathan Michael Allen, Steven P. Jones, Adalberto G. Yanes 2005-11-08
6957293 Split completion performance of PCI-X bridges based on data transfer amount Adalberto G. Yanes 2005-10-18
6909315 Data strobe signals (DQS) for high speed dynamic random access memories (DRAMs) Michael Frank Carnevale, Paul Allen Ganfield 2005-06-21
6766405 Accelerated error detection in a bus bridge circuit Adalberto G. Yanes 2004-07-20
6728818 Dual storage adapters utilizing clustered adapters supporting fast write caches Brian E. Bakke, Robert Edward Galbraith, Frederic Lawrence Huss, Paul Gary Reuland, Timothy J. Schimke 2004-04-27