Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9684756 | Assigning nets to wiring planes using zero wire load and signal propagation timing for chip design | Alexandra Echegaray, Jesse Peter Surprise, Stephen Szulewski | 2017-06-20 |
| 8522187 | Method and data processing system to optimize performance of an electric circuit design, data processing program and computer program product | Niels Fricke, Juergen Koehl, Karsten Muuss, Matthias Ringe | 2013-08-27 |