Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11003453 | Branch target buffer for emulation environments | Carlos D. Cavanna, Reid T. Copeland, Chad McIntyre | 2021-05-11 |
| 10534612 | Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments | Carlos D. Cavanna, Reid T. Copeland, Chad McIntyre | 2020-01-14 |
| 10133652 | Debugging optimized code using FAT binary | Michael Moniz, Diana P. Sutandie, Srivatsan Vijayakumar, Ying Zhang | 2018-11-20 |
| 9940218 | Debugging optimized code using fat binary | Michael Moniz, Diana P. Sutandie, Srivatsan Vijayakumar, Ying Zhang | 2018-04-10 |
| 9858054 | Method for optimizing binary code in language having access to binary coded decimal variable, and computer and computer program | Toshihiko Koju | 2018-01-02 |
| 9626186 | Hybrid polymoprhic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments | Carlos D. Cavanna, Reid T. Copeland, Chad McIntyre | 2017-04-18 |
| 9317292 | Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments | Carlos D. Cavanna, Reid T. Copeland, Chad McIntyre | 2016-04-19 |
| 9280328 | Method for optimizing binary code in language having access to binary coded decimal variable, and computer and computer program | Toshihiko Koju | 2016-03-08 |
| 9235420 | Branch target buffer for emulation environments | Carlos D. Cavanna, Reid T. Copeland, Chad MC INTYRE | 2016-01-12 |
| 9158566 | Page mapped spatially aware emulation of computer instruction set | Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran | 2015-10-13 |
| 8972704 | Code section optimization by removing memory barrier instruction and enclosing within a transaction that employs hardware transaction memory | Toshihiko Koju, Takuya Nakaike, Harold W. Cain, III, Maged M. Michael | 2015-03-03 |
| 8949106 | Just in time compiler in spatially aware emulation of a guest computer instruction set | Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran | 2015-02-03 |
| 8869128 | Compiling method, program, and information processing apparatus | Toshihiko Koju, Xin Tong | 2014-10-21 |
| 8819647 | Performance improvements for nested virtual machines | Marcel Mitran | 2014-08-26 |
| 8768683 | Self initialized host cell spatially aware emulation of a computer instruction set | Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran | 2014-07-01 |
| 8713289 | Efficiently emulating computer architecture condition code settings without executing branch instructions | Reid T. Copeland, Patrick R. Doyle, Charles B. Hall, Andrew Johnson | 2014-04-29 |
| 8689198 | Compiling system and method for optimizing binary code | Motohiro Kawahito, Vijay Sundaresan | 2014-04-01 |
| 8639492 | Accelerated execution for emulated environments | Francis Bogsanyl, Graeme Johnson, Andrew R. Low, Marcel Mitran | 2014-01-28 |
| 8612731 | Branch target buffer for emulation environments | Carlos D. Cavanna, Reid T. Copeland, Chad McIntyre | 2013-12-17 |
| 8447583 | Self initialized host cell spatially aware emulation of a computer instruction set | Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran | 2013-05-21 |
| 8428930 | Page mapped spatially aware emulation of a computer instruction set | Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran | 2013-04-23 |
| 8387031 | Providing code improvements for nested virtual machines | Derek B. Inglis, Marcel Mitran, Kevin A. Stoodley | 2013-02-26 |
| 8364461 | Reusing invalidated traces in a system emulator | Theodore J. Bohizic, Reid T. Copeland, Kirk A. Stewart | 2013-01-29 |
| 8301434 | Host cell spatially aware emulation of a guest wild branch | Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran | 2012-10-30 |
| 7716657 | Compiler optimization with privatizing of a non-final object | Derek B. Inglis | 2010-05-11 |