Issued Patents All Time
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5784637 | Single-chip semiconductor integrated circuit device and microcomputer integrated on a semiconductor chip | Terumi Sawase, Kouki Noguchi, Hideo Nakamura, Yasushi Akao, Shiro Baba | 1998-07-21 |
| 5511211 | Method for flexibly developing a data processing system comprising rewriting instructions in non-volatile memory elements after function check indicates failure of required functions | Yasushi Akao, Shiro Baba, Terumi Sawase | 1996-04-23 |
| 5430885 | Multi-processor system and co-processor used for the same | Kenji Kaneko, Hirotada Ueda, Tetsuya Nakagawa, Atsuchi Kiuchi, You Takamori +1 more | 1995-07-04 |
| 5428808 | Single-chip microcomputer | Terumi Sawase, Kouki Noguchi, Hideo Nakamura, Yasushi Akao, Shiro Baba | 1995-06-27 |
| 5426744 | Single chip microprocessor for satisfying requirement specification of users | Terumi Sawase, Hideo Nakamura, Hiroyuki Hatori, Shirou Baba, Yasushi Akao | 1995-06-20 |
| 5321845 | Single-chip microcomputer including non-volatile memory elements | Terumi Sawase, Kouki Noguchi, Hideo Nakamura, Yasushi Akao, Shiro Baba | 1994-06-14 |
| 5175840 | Microcomputer having a PROM including data security and test circuitry | Terumi Sawase, Hideo Nakamura, Toshimasa Kihara, Kiyoshi Matsubara, Tadashi Yamaura | 1992-12-29 |
| 5165086 | Microprocessor chip using two-level metal lines technology | Shigehiro Kamejima, Kouki Noguchi, Minoru Ishii, Tadahiko Nishimukai, Hideo Nakamura +2 more | 1992-11-17 |
| 5117488 | Microprogram controlled microprocessor having a selectively expandable instruction code length including independent description of operand addressing and a type of operation for an operand by single instruction in a common coding scheme | Kouki Noguchi, Fumio Tsuchiya, Takashi Tsukamoto, Shigeki Masumura, Hideo Nakamura +1 more | 1992-05-26 |
| 5109492 | Microprocessor which terminates bus cycle when access address falls within a predetermined processor system address space | Kouki Noguchi, Kazuhiko Iwasaki, Hirokazu Aoki, Shigeru Shimada | 1992-04-28 |
| 4996659 | Method of diagnosing integrated logic circuit | Noboru Yamaguchi, Hideo Nakamura, Tsukasa Sato, Haruo Koizumi | 1991-02-26 |
| 4967349 | Digital signal processor suitable for extacting minimum and maximum values at high speed | Kazuyuki Kodama, Hirotada Ueda, Kenji Keneko, Hitoshi Matsushima | 1990-10-30 |
| 4958276 | Single chip processor | Atsushi Kiuchi, Kenji Kaneko, Jun Ishida, Tetsuya Nakagawa, Takashi Akazawa +1 more | 1990-09-18 |
| 4945506 | High speed digital signal processor capable of achieving realtime operation | Toru Baji, Hirotsugu Kojima, Nario Sumi, Shinya Ohba | 1990-07-31 |
| 4910466 | Selecting means for selecting a plurality of information | Atsushi Kiuchi, Jun Ishida, Kenji Kaneko, Tetsuya Nakagawa, Tomoru Sato +2 more | 1990-03-20 |
| 4821187 | Processor capable of executing one or more programs by a plurality of operation units | Hirotada Ueda, Hitoshi Matsushima, Kenji Kaneko | 1989-04-11 |
| 4812969 | Address translation unit | Katsuaki Takagi, Hirokazu Aoki, Norio Nakagawa | 1989-03-14 |
| 4809206 | Information processing apparatus | Atsushi Kiuchi, Kenji Kaneko, Jun Ishida, Tetsuya Nakagawa, Hirotada Ueda | 1989-02-28 |
| 4752905 | High-speed multiplier having carry-save adder circuit | Tetsuya Nakagawa, Kenji Kaneko, Hitoshi Matsushima, Hirotada Ueda | 1988-06-21 |
| 4745581 | LSI system of a structure requiring no additional address signals to incorporate additional status registers into the system | Tomoru Sato, Kenji Kaneko, Hirotada Ueda, Hitoshi Matsushima, Tetsuya Nakagawa +1 more | 1988-05-17 |
| 4740923 | Memory circuit and method of controlling the same | Kenji Kaneko, Jun Ishida, Hitoshi Matsushima, Hirotada Ueda | 1988-04-26 |
| 4720811 | Microprocessor capable of stopping its operation at any cycle time | Noboru Yamaguchi, Kunio Uchiyama, Haruo Koizumi, Tadahiko Nishimukai | 1988-01-19 |
| 4620292 | Arithmetic logic unit for floating point data and/or fixed point data | Shizuo Sugiyama, Narimichi Maeda, Osamu Yumoto, Takashi Akazawa, Masahito Kobayashi +2 more | 1986-10-28 |
| 4592006 | Adder for floating point data suitable for digital signal processing | Shizuo Sugiyama, Narimichi Maeda, Osamu Yumoto, Takashi Akazawa, Masahito Kobayashi +2 more | 1986-05-27 |
| 4577154 | Pulse width modulation circuit and integration circuit of analog product using said modulation circuit | Katsuaki Takagi, Yuzo Kita, Kazuyoshi Ogawa, Hideo Hara | 1986-03-18 |