Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4620292 | Arithmetic logic unit for floating point data and/or fixed point data | Yoshimune Hagiwara, Narimichi Maeda, Osamu Yumoto, Takashi Akazawa, Masahito Kobayashi +2 more | 1986-10-28 |
| 4592006 | Adder for floating point data suitable for digital signal processing | Yoshimune Hagiwara, Narimichi Maeda, Osamu Yumoto, Takashi Akazawa, Masahito Kobayashi +2 more | 1986-05-27 |
| 4534010 | Floating point type multiplier circuit with compensation for over-flow and under-flow in multiplication of numbers in two's compliment representation | Masahito Kobayashi, Narimichi Maeda, Yoshimune Hagiwara, Takashi Akazawa | 1985-08-06 |
| 4511990 | Digital processor with floating point multiplier and adder suitable for digital signal processing | Yoshimune Hagiwara, Narimichi Maeda, Osamu Yumoto, Takashi Akazawa, Masahito Kobayashi +2 more | 1985-04-16 |