Issued Patents All Time
Showing 1–25 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9650038 | Vehicle control system | Kentaro Yoshimura, Kohei Sakurai, Nobuyasu Kanekawa, Yuichiro Morita, Yoshiaki Takahashi +6 more | 2017-05-16 |
| 9573489 | Control device for railway power conditioner and control system for railway power conditioner | Yasuhiro Imazu, Osamu Sakuchi, Masaya Ichinose, Yasuhiro Kiyofuji, Akira Bando +6 more | 2017-02-21 |
| 8645022 | Vehicle control system | Kentaro Yoshimura, Kohei Sakurai, Nobuyasu Kanekawa, Yuichiro Morita, Yoshiaki Takahashi +6 more | 2014-02-04 |
| 8578135 | Apparatus for calculating and prefetching a branch target address | Teppei Hirotsu, Yuuichi Abe, Takeshi Kataoka | 2013-11-05 |
| 8423661 | Packet communication device, packet communication system, packet communication module, data processor, and data transfer system | Hiroshi Arita, Yasuwo Watanabe, Kei Ouchi, Yoshihiro Tanaka, Toshinobu Kanai +3 more | 2013-04-16 |
| 7814223 | Packet communication device, packet communication system, packet communication system, packet communication module, data processor, and data transfer system | Hiroshi Arita, Yasuwo Watanabe, Kei Ouchi, Yoshihiro Tanaka, Toshinobu Kanai +3 more | 2010-10-12 |
| 7676651 | Micro controller for decompressing and compressing variable length codes via a compressed code dictionary | Hiromichi Yamada, Yuichi Abe, Takanaga Yamazaki | 2010-03-09 |
| 7630807 | Vehicle control system | Kentaro Yoshimura, Kohei Sakurai, Nobuyasu Kanekawa, Yuichiro Morita, Yoshiaki Takahashi +6 more | 2009-12-08 |
| 7570748 | Control and monitoring telecommunication system and method of setting a modulation method | Yoshikazu Ishii, Setsuo Arita, Yuji Ichinose, Nao Saito, Daisuke Sinma | 2009-08-04 |
| 7557809 | Memory access methods in a unified memory system | Tetsuya Shimomura, Manabu Jyou, Yuichiro Morita, Takashi Hotta, Kazushige Yamagishi +1 more | 2009-07-07 |
| 7496679 | Packet communication apparatus | Hiroshi Arita, Yasuwo Watanabe, Yoshihiro Tanaka, Kenji Furuhashi | 2009-02-24 |
| 7428690 | Packet communication apparatus | Hiroshi Arita, Kotaro Shimamura, Yasuwo Watanabe | 2008-09-23 |
| 7333116 | Data processor having unified memory architecture using register to optimize memory access | Tetsuya Shimomura, Shigeru Matsuo, Koyo Katsura, Tatsuki Inuzuka | 2008-02-19 |
| 7142213 | Graphics drawing device and method | Keisuke Nakashima, Shigeru Matsuo, Masahisa Narita, Koyo Katsura, Hidehito Takewa +1 more | 2006-11-28 |
| 7111187 | Information processor and information processing system utilizing interface for synchronizing clock signal | Takashi Hotta, Kozaburo Kurita, Masahiro Iwamura, Hideo Maejima, Shigeya Tanaka +3 more | 2006-09-19 |
| 7064756 | Data processing apparatus and shading apparatus | Shigeru Matsuo, Jun Satoh, Masanori Miyoshi, Koyo Katsura, Takashi Sone | 2006-06-20 |
| 6986029 | Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein | Hiromichi Yamada, Dai Fujii, Takashi Hotta, Kotaro Shimamura, Tatsuki Inuduka +1 more | 2006-01-10 |
| 6954206 | Data processor having unified memory architecture using register to optimize memory access | Tetsuya Shimomura, Shigeru Matsuo, Koyo Katsura, Tatsuki Inuzuka | 2005-10-11 |
| 6915413 | Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein | Hiromichi Yamada, Dai Fujii, Takashi Hotta, Kotaro Shimamura, Tatsuki Inuduka +1 more | 2005-07-05 |
| 6839063 | Memory access methods in a unified memory system | Tetsuya Shimomura, Manabu Jyou, Yuichiro Morita, Takashi Hotta, Kazushige Yamagishi +1 more | 2005-01-04 |
| 6806875 | Data processing apparatus and shading apparatus | Shigeru Matsuo, Jun Satoh, Masanori Miyoshi, Koyo Katsura, Takashi Sone | 2004-10-19 |
| 6745279 | Memory controller | Yuichiro Morita, Manabu Jyou, Tetsuya Shimomura, Yutaka Okada, Kazushige Yamagishi | 2004-06-01 |
| 6731291 | Image processing device and system using the same | Keisuke Nakashima, Shigeru Matsuo, Masahisa Narita, Koyo Katsura, Hidehito Takewa +1 more | 2004-05-04 |
| 6717583 | Data processor having unified memory architecture providing priority memory access | Tetsuya Shimomura, Shigeru Matsuo, Koyo Katsura, Tatsuki Inuzuka | 2004-04-06 |
| 6675311 | Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices | Takashi Hotta, Kozaburo Kurita, Masahiro Iwamura, Hideo Maejima, Shigeya Tanaka +3 more | 2004-01-06 |