Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5922068 | Information processing system and information processing method for executing instructions in parallel | Yooichi Shintani, Kazunori Kuriyama, Eiki Kamada, Kiyoshi Inoue | 1999-07-13 |
| 5671382 | Information processing system and information processing method for executing instructions in parallel | Yooichi Shintani, Kazunori Kuriyama, Eiki Kamada, Kiyoshi Inoue | 1997-09-23 |
| 5418917 | Method and apparatus for controlling conditional branch instructions for a pipeline type data processing apparatus | Tooru Hiraoka, Kouji Nakamura | 1995-05-23 |
| 5317703 | Information processing apparatus using an advanced pipeline control method | Tooru Hiraoka, Kouji Nakamura | 1994-05-31 |
| 5267350 | Method for fetching plural instructions using single fetch request in accordance with empty state of instruction buffers and setting of flag latches | Kenji Matsubara, Seiji Nagai, Akihiro Fuseda | 1993-11-30 |
| 5075849 | Information processor providing enhanced handling of address-conflicting instructions during pipeline processing | Kazunori Kuriyama, Yooichi Shintani, Eiki Kamada, Kiyoshi Inoue | 1991-12-24 |
| 4942525 | Data processor for concurrent executing of instructions by plural execution units | Yooichi Shintani, Kazunori Kuriyama, Eiki Kamada, Kiyoshi Inoue | 1990-07-17 |
| 4928226 | Data processor for parallelly executing conflicting instructions | Eiki Kamada, Yooichi Shintani, Kazunori Kuriyama, Kiyoshi Inoue | 1990-05-22 |
| 4858105 | Pipelined data processor capable of decoding and executing plural instructions in parallel | Kazunori Kuriyama, Yooichi Shintani, Akira Yamaoka, Eiki Kamada, Kiyoshi Inoue | 1989-08-15 |
| 4831515 | Information processing apparatus for determining sequence of parallel executing instructions in response to storage requirements thereof | Eiki Kamada, Yooichi Shintani, Shigeo Takeuchi | 1989-05-16 |
| 4760520 | Data processor capable of executing instructions under prediction | Yooichi Shintani, Eiki Kamada, Shigeo Takeuchi | 1988-07-26 |
| 4752873 | Data processor having a plurality of operating units, logical registers, and physical registers for parallel instructions execution | Eiki Kamada, Shigeo Takeuchi | 1988-06-21 |
| 4736288 | Data processing device | Yooichi Shintani, Shigeo Takeuchi | 1988-04-05 |