Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5467292 | Logical operation method employing parallel arithmetic unit | Hiroo Watai, Takao Nishida, Masahiko Nagai | 1995-11-14 |
| 5184308 | Fault simulation method | Masahiko Nagai, Hiroo Watai, Kaoru Moriwaki | 1993-02-02 |