Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4811269 | Bit slice multiplication circuit | Kenji Hirose, Hidekazu Matsumoto, Shinichiro Yamaguchi, Hirokazu Hirayama, Hiroaki Nakanishi | 1989-03-07 |
| 4807113 | Microprogrammed control data processing apparatus in which operand source and/or operand destination is determined independent of microprogram control | Hidekazu Matsumoto, Ryosei Hiraoka, Takayuki Morioka, Yoshihiro Miyazaki | 1989-02-21 |
| 4783731 | Multicomputer system having dual common memories | Yoshihiro Miyazaki, Jushi Ide, Takeshi Kato, Hiroaki Nakanishi | 1988-11-08 |
| RE32493 | Data processing unit with pipelined operands | Hideaki Matsumoto, Hideo Maejima | 1987-09-01 |
| 4644490 | Floating point data adder | Takao Kobayashi, Shigeo Abe, Masao Takatoo, Hidekazu Matsumoto, Hideyuki Hara | 1987-02-17 |
| 4530050 | Central processing unit for executing instructions of variable length having end information for operand specifiers | Yasushi Fukunaga, Kotaro Hirasawa, Hidekazu Matsumoto, Jushi Ide, Takeshi Katoh +3 more | 1985-07-16 |
| 4523274 | Data processing system with processors having different processing speeds sharing a common bus | Yasushi Fukunaga | 1985-06-11 |
| 4523272 | Bus selection control in a data transmission apparatus for a multiprocessor system | Yasushi Fukunaga, Ryosei Hiraoka, Hidekazu Matsumoto, Jushi Ide, Tetsuya Kawakami | 1985-06-11 |
| 4520441 | Data processing system | Hidekazu Matsumoto, Yasushi Fukunaga, Ryosei Hiraoka, Jushi Ide, Tetsuya Kawakami | 1985-05-28 |
| 4486834 | Multi-computer system having dual common memory | Yoshiki Kobayashi, Hideo Maejima, Hiroaki Nakanishi | 1984-12-04 |
| 4481573 | Shared virtual address translation unit for a multiprocessor system | Yasushi Fukunaga, Hidekazu Matsumoto, Ryosei Hiraoka, Jushi Ide, Takeshi Kato +1 more | 1984-11-06 |
| 4454578 | Data processing unit with pipelined operands | Hidekazu Matsumoto, Hideo Maejima | 1984-06-12 |
| 4365311 | Control of instruction pipeline in data processing system | Yasushi Fukunaga | 1982-12-21 |
| 4296468 | Address conversion unit for data processing system | Yasushi Fukunaga | 1981-10-20 |