SK

Shigenori Kaneko

HI Hitachi: 9 patents #4,653 of 28,497Top 20%
HE Hitachi Process Computer Engineering: 3 patents #16 of 101Top 20%
📍 Oarai, JP: #4 of 60 inventorsTop 7%
Overall (All Time): #520,014 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
7712104 Multi OS configuration method and computer system Tomoki Sekiguchi, Toshiaki Arai, Hiroshi Ohno, Taro Inoue, Takashi Shibata 2010-05-04
6892261 Multiple operating system control method Hiroshi Ohno, Tomoaki Nakamura, Ryokichi Yoshizawa, Naoshi Kato, Manabu Yamauchi +2 more 2005-05-10
6772419 Multi OS configuration system having an interrupt process program executes independently of operation of the multi OS Tomoki Sekiguchi, Toshiaki Arai, Hiroshi Ohno, Taro Inoue, Takashi Shibata 2004-08-03
6715016 Multiple operating system control method Hiroshi Ohno, Tomoaki Nakamura, Ryokichi Yoshizawa, Naoshi Kato, Manabu Yamauchi +2 more 2004-03-30
6711605 Multi OS configuration method and computer system Tomoki Sekiguchi, Toshiaki Arai, Hiroshi Ohno, Taro Inoue, Takashi Shibata 2004-03-23
6216236 Processing unit for a computer and a computer system incorporating such a processing unit Takeshi Miyao, Manabu Araoka, Tomoaki Nakamura, Masayuki Tanji, Koji Masui +6 more 2001-04-10
6138248 Common disk unit multi-computer system Masahiko Saito, Hidehito Takewa, Kenichi Kurosawa, Yoshihiro Miyazaki 2000-10-24
5901281 Processing unit for a computer and a computer system incorporating such a processing unit Takeshi Miyao, Manabu Araoka, Tomoaki Nakamura, Masayuki Tanji, Koji Masui +6 more 1999-05-04
5787464 Computer system including a dual memory configuration which supports on-line memory extraction and insertion Ryokichi Yoshizawa, Takeshi Miyao, Tomoaki Nakamura, Hidebumi Miyata 1998-07-28
5579508 Main memory managing method and apparatus in which main memory is partitioned into three distinct areas Ryokichi Yoshizawa, Tomoaki Nakamura 1996-11-26