Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9612989 | Computer system and routing control method | Shuhei Eguchi, Takashi Todaka | 2017-04-04 |
| 9479461 | Computer system and method for communicating data between computers | Shuhei Eguchi, Yoshiki Murakami | 2016-10-25 |
| 7036060 | Semiconductor integrated circuit and its analyzing method | Michinobu Nakao, Kazumi Hatayama, Seiji Kobayashi, Kazunori Hikone, Kotaro Shimamura | 2006-04-25 |
| 6675249 | Information processing equipment and information processing system | Teruaki Shimoda, Kei Yamamoto | 2004-01-06 |
| 6355984 | Input-output circuit cell and semiconductor integrated circuit apparatus | Kazuhisa Miyamoto, Takayuki Uda | 2002-03-12 |
| 6321355 | Semiconductor integrated circuit and method of testing the same | Kouji Izaki, Tetsuya Takahashi | 2001-11-20 |
| 6222278 | Input-output circuit cell and semiconductor integrated circuit apparatus | Kazuhisa Miyamoto, Takayuki Uda | 2001-04-24 |
| 6121687 | Input-output circuit cell and semiconductor integrated circuit apparatus | Kazuhisa Miyamoto, Takayuki Uda | 2000-09-19 |
| 5640508 | Fault detecting apparatus for a microprocessor system | Hirokatsu Fujiwara | 1997-06-17 |
| 5499379 | Input/output execution apparatus for a plural-OS run system | Shunji Tanaka, Toru Ohtsuki, Hiroaki Sato, Hideo Sawamoto, Masaya Watanabe +2 more | 1996-03-12 |
| 5317710 | Invalidation of entries in a translation table by providing the machine a unique identification thereby disallowing a match and rendering the entries invalid | Mari Ara, Hideo Sawamoto | 1994-05-31 |
| 5129071 | Address translation apparatus in virtual machine system using a space identifier field for discriminating DATOFF (dynamic address translation off) virtual machines | Hideo Sawamoto, Hidenori Umeno | 1992-07-07 |