Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504022 | Neural network accelerator with parameters resident on chip | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2019-12-10 |
| 10496326 | Hardware double buffering using a special purpose computational unit | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2019-12-03 |
| 10417303 | Matrix processing apparatus | Rahul Nagarajan, Dong Hyuk Woo, Christopher Daniel Leary | 2019-09-17 |
| 10373291 | Image transformation for machine learning | Carrell Daniel Killebrew, Dong Hyuk Woo | 2019-08-06 |
| 10360163 | Exploiting input data sparsity in neural network compute units | Dong Hyuk Woo | 2019-07-23 |
| 10248908 | Alternative loop limits for accessing data in multi-dimensional tensors | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2019-04-02 |
| 10175980 | Neural network compute tile | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2019-01-08 |
| 10175912 | Hardware double buffering using a special purpose computational unit | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2019-01-08 |
| 10108538 | Accessing prologue and epilogue data | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2018-10-23 |
| 9959498 | Neural network instruction set architecture | Dong Hyuk Woo, Olivier Temam, Harshit Khaitan | 2018-05-01 |
| 9946539 | Accessing data in multi-dimensional tensors using adders | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2018-04-17 |
| 9928460 | Neural network accelerator tile architecture with three-dimensional stacking | Andreas Nowatzyk, Olivier Temam, Uday Kumar Dasari | 2018-03-27 |
| 9898441 | Matrix processing apparatus | Rahul Nagarajan, Dong Hyuk Woo, Christopher Daniel Leary | 2018-02-20 |
| 9880976 | Matrix processing apparatus | Rahul Nagarajan, Dong Hyuk Woo, Christopher Daniel Leary | 2018-01-30 |
| 9836691 | Neural network instruction set architecture | Dong Hyuk Woo, Olivier Temam, Harshit Khaitan | 2017-12-05 |
| 9818059 | Exploiting input data sparsity in neural network compute units | Dong Hyuk Woo | 2017-11-14 |
| 9805001 | Matrix processing apparatus | Rahul Nagarajan, Dong Hyuk Woo, Christopher Daniel Leary | 2017-10-31 |
| 9798701 | Matrix processing apparatus | Rahul Nagarajan, Dong Hyuk Woo, Christopher Daniel Leary | 2017-10-24 |
| 9710265 | Neural network compute tile | Olivier Temam, Harshit Khaitan, Dong Hyuk Woo | 2017-07-18 |
| 5287464 | Semiconductor multi-device system with logic means for controlling the operational mode of a set of input/output data bus drivers | Niraj Kumar, Hanumanthrao Nimishakavi, Ikuji Nobugaki | 1994-02-15 |