Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9385961 | Parallel computing device, communication control device, and communication control method | Shinya Hiramoto, Yuichiro Ajima, Tomohiro Inoue | 2016-07-05 |
| 5179693 | System for controlling operation of processor by adjusting duty cycle of performance control pulse based upon target performance value | Toshiaki Kitamura, Kazuyuki Shimizu, Katsumi Onishi | 1993-01-12 |
| 5073871 | Main storage access priority control system that checks bus conflict condition and logical storage busy condition at different clock cycles | Nobuo Uchida, Mikio Itoh | 1991-12-17 |
| 5043868 | System for by-pass control in pipeline operation of computer | Toshiaki Kitamura, Katsumi Onishi | 1991-08-27 |
| 4910671 | Data processing system having a performance control pulse with a variable duty cycle for controlling execution and non-execution of instructions | Toshiaki Kitamura, Kazuyuki Shimizu, Katsumi Onishi | 1990-03-20 |
| 4852021 | Centralized command transfer control system for connecting processors which independently send and receive commands | Aiichiro Inoue, Katsumi Onishi, Kenichi Nojima | 1989-07-25 |
| 4812970 | Microprogram control system | Toshiaki Kitamura, Katsumi Onishi | 1989-03-14 |
| 4802113 | Pipeline control system | Katsumi Onishi, Kohei Otsuyama | 1989-01-31 |
| 4800490 | Buffer storage control system having a priority circuit | Tsutomu Tanaka | 1989-01-24 |
| 4742446 | Computer system using cache buffer storage unit and independent storage buffer device for store through operation | Tetsuya Morioka, Tsutomu Tanaka, Katsumi Onishi | 1988-05-03 |
| 4701915 | Error recovery system in a data processor having a control storage | Toshiaki Kitamura | 1987-10-20 |
| 4665479 | Vector data processing system for indirect address instructions | — | 1987-05-12 |