Issued Patents All Time
Showing 26–50 of 102 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10225069 | CDR circuit and receiving circuit | Wahid Rahman, Ali Sheikholeslami, Takayuki Shibasaki | 2019-03-05 |
| 10007877 | Boltzmann machine circuit | Yanfei Chen, Sanroku Tsukamoto | 2018-06-26 |
| 9742405 | Semiconductor integrated circuit | Hisanori Fujisawa, Hiroaki Fujimoto, Safeen Huda, Jason H. Anderson | 2017-08-22 |
| 9213796 | Method for designing semiconductor integrated circuit and program | Jason H. Anderson, Safeen Huda, Hiroaki Fujimoto | 2015-12-15 |
| 9191187 | Reception circuit and semiconductor integrated circuit | Takayuki Shibasaki | 2015-11-17 |
| 9160403 | Signal transmission circuit, signal transmission system, and signal transmission method | Kosuke Suzuki | 2015-10-13 |
| 9118451 | Receiver circuit and receiving method | Masaya Kibune | 2015-08-25 |
| 9112673 | Reception circuit | Shigeto Suzuki | 2015-08-18 |
| 9054714 | Clock recovery circuit and clock and data recovery circuit | Kosuke Suzuki | 2015-06-09 |
| 9001902 | Transmission system | Tadahisa Matsumoto | 2015-04-07 |
| 8989333 | Clock data recovery method and clock data recovery circuit | Takushi Hashida | 2015-03-24 |
| 8983013 | Signal processing circuit and signal processing method | — | 2015-03-17 |
| 8981854 | Clock distributor and electronic apparatus | Yasumoto Tomita | 2015-03-17 |
| 8964899 | Receiving circuit | — | 2015-02-24 |
| 8964864 | Transmission system | — | 2015-02-24 |
| 8902007 | Clock distributor and electronic device | Yasumoto Tomita | 2014-12-02 |
| 8878578 | Jitter monitor | — | 2014-11-04 |
| 8634454 | Receiver circuit, method of adjusting offset, and transmission/reception system | Masaya Kibune | 2014-01-21 |
| 8559578 | Data reproduction circuit | — | 2013-10-15 |
| 8335290 | Data receiving circuit determining logic of input signal based on digital value | Yoshiyasu Doi | 2012-12-18 |
| 8320503 | Receiver | Masaya Kibune | 2012-11-27 |
| 8319542 | Integrated circuit including bypass signal path | Masaya Kibune | 2012-11-27 |
| 8300754 | Clock and data recovery with a data aligner | Nikola Nedovic, Nestor Tzartzanis, William W. Walker | 2012-10-30 |
| 8258882 | Clock signal distributing device | Takayuki Shibasaki | 2012-09-04 |
| 8238504 | Clock generation circuit and system | Yasumoto Tomita, Masaya Kibune | 2012-08-07 |