Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12333150 | Partitioned non-volatile memory (NVM) having a normal read bus and a verify read bus | Maurits Mario Nicolaas Storms, Jon S. Choy, Christopher Hume | 2025-06-17 |
| 12051476 | Testing disruptive memories | Jon S. Choy, Michael A. Sadd | 2024-07-30 |
| 11989417 | Column repair in a memory system using a repair cache | Jon S. Choy, Maurits Mario Nicolaas Storms, Christopher Hume, Silvia Wagemans | 2024-05-21 |
| 10007588 | Full address coverage during memory array built-in self-test with minimum transitions | Botang Shao, Thomas Jew, Edward Bryann C. Fernandez | 2018-06-26 |
| 9830479 | Key storage and revocation in a secure memory system | Richard Soja, Nancy Hing-Che Amedeo | 2017-11-28 |
| 9246512 | Error correcting device, method for monitoring an error correcting device and data processing system | Michael Rohleder, Stefan Doll, Rolf Dieter Schlagenhaft | 2016-01-26 |
| 9214045 | Flash memory express erase and program | Thomas Jew | 2015-12-15 |
| 8504884 | Threshold voltage techniques for detecting an imminent read failure in a memory array | Richard K. Eguchi, Thomas S. Harp, Thomas Jew, Peter Kuhn | 2013-08-06 |
| 8380918 | Non-volatile storage alteration tracking | Richard Soja, James B. Eifert | 2013-02-19 |
| 8261011 | One-time programmable memory device and methods thereof | Kelly K. Taylor | 2012-09-04 |
| 8151075 | Multiple access type memory and method of operation | David W. Chrudimsky, William C. Moyer | 2012-04-03 |
| 7624329 | Programming a memory device having error correction logic | Ronald J. Syzdek | 2009-11-24 |