Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11632053 | Isolated switched-mode power converter having secondary-side rectified voltage sensing | Sujata Sen, Sue Perranoski, Cha-Fu Tsai | 2023-04-18 |
| 10770983 | Circuits and methods for secondary-side rectified voltage sensing in isolated switched-mode power converters | Sujata Sen, Sue Perranoski, Cha-Fu Tsai | 2020-09-08 |
| 8558524 | Master/slave power supply switch driver circuitry | Robert T. Carroll | 2013-10-15 |
| 8476939 | Switching power supply gate driver | Anthony B. Candage | 2013-07-02 |
| 8412923 | Multi-mode pin usage in a power supply control integrated circuit | Robert T. Carroll, Dror Barash, Frank Kern | 2013-04-02 |
| 7443250 | Programmable phase-locked loop responsive to a selected bandwidth and a selected reference clock signal frequency to adjust circuit characteristics | Srisai R. Seethamraju, William J. Anker, Richard J. Juhn | 2008-10-28 |
| 7405628 | Technique for switching between input clocks in a phase-locked loop | Srisai R. Seethamraju, Shailesh Chitnis | 2008-07-29 |
| 7348818 | Tunable high-speed frequency divider | Ligang Zhang | 2008-03-25 |
| 7079369 | Active power/ground ESD trigger | Jay R. Chapin | 2006-07-18 |
| 7030669 | Circuit to linearize gain of a voltage controlled oscillator over wide frequency range | James J. McDonald, II | 2006-04-18 |
| 6940356 | Circuitry to reduce PLL lock acquisition time | James J. McDonald, II | 2005-09-06 |
| 6927460 | Method and structure for BiCMOS isolated NMOS transistor | Steven Leibiger, Michael Harley-Stead, Daniel Hahn | 2005-08-09 |
| 6894553 | Capacitively coupled current boost circuitry for integrated voltage regulator | James J. McDonald, II | 2005-05-17 |
| 6855964 | Triggering of an ESD NMOS through the use of an N-type buried layer | — | 2005-02-15 |
| 6794945 | PLL for clock recovery with initialization sequence | James J. McDonald, II, Jim Wunderlich | 2004-09-21 |
| 6261932 | Method of fabricating Schottky diode and related structure | — | 2001-07-17 |
| 6117717 | Method for after gate implant of threshold adjust with low impact on gate oxide integrity | Thomas A. Carbone | 2000-09-12 |
| 6100125 | LDD structure for ESD protection and method of fabrication | Steven Leibiger, Michael Harley-Stead, Daniel Hahn | 2000-08-08 |