Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8261124 | System and method for optimized error correction in flash memory arrays | — | 2012-09-04 |
| 7827359 | Clock encoded pre-fetch to access memory data in clustering network environment | — | 2010-11-02 |
| 7619984 | Mechanism for error handling of corrupted repeating primitives during frame reception | — | 2009-11-17 |
| 7366958 | Race condition prevention | Nathan Marushak, Roger C. Jeppsen, Richard Beckett, Devicharan Devidas | 2008-04-29 |
| 5894560 | Method and apparatus for controlling I/O channels responsive to an availability of a plurality of I/O devices to transfer data | Joel M. Ward, Michael A. Winchell | 1999-04-13 |
| 5864712 | Method and apparatus for controlling (N+I) I/O channels with (N) data managers in a homogenous software programmable environment | Joel M. Ward, Michael A. Winchell | 1999-01-26 |
| 5831393 | Flexible parity generation circuit | Gerald L. Hohenstein, Michael E. Nielson, Tin S. Tang, William A. Brant | 1998-11-03 |
| 5675726 | Flexible parity generation circuit | Gerald L. Hohenstein, Michael E. Nielson, Tin S. Tang, William A. Brant | 1997-10-07 |
| 5469566 | Flexible parity generation circuit for intermittently generating a parity for a plurality of data channels in a redundant array of storage units | Gerald L. Hohenstein, Michael E. Nielson, Tin S. Tang, William A. Brant | 1995-11-21 |