MN

Michael E. Nielson

EM Emc: 10 patents #321 of 3,345Top 10%
IBM: 4 patents #21,733 of 70,183Top 35%
Overall (All Time): #355,491 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7197617 Process, apparatus, and system for storing data check information using standard sector data field sizes William A. Brant, Noel Simen Otterness, Thomas E. Richardson 2007-03-27
6760807 System, apparatus and method providing adaptive write policy for disk array controllers William A. Brant, William G. Deitz, Joseph G. Skazinski 2004-07-06
6625144 Dual-use DB9 connector for RS-232 or dual-active controller communication Mohamed H. El-Batal 2003-09-23
6438647 Method and apparatus for providing battery-backed immediate write back cache for an array of disk drives in a computer system Thomas E. Richardson 2002-08-20
5905854 Fault tolerant memory system William A. Brant, Gary Neben 1999-05-18
5887270 Fault tolerant controller system and method William A. Brant, Gary Ward Howard 1999-03-23
5831393 Flexible parity generation circuit Gerald L. Hohenstein, Tin S. Tang, Richard Carmichael, William A. Brant 1998-11-03
5805787 Disk based disk cache interfacing system and method William A. Brant 1998-09-08
5799200 Power failure responsive apparatus and method having a shadow dram, a flash ROM, an auxiliary battery, and a controller William A. Brant, Edde Tin Shek Tang 1998-08-25
5708771 Fault tolerant controller system and method William A. Brant, Gary Ward Howard 1998-01-13
5675726 Flexible parity generation circuit Gerald L. Hohenstein, Tin S. Tang, Richard Carmichael, William A. Brant 1997-10-07
5619642 Fault tolerant memory system which utilizes data from a shadow memory device upon the detection of erroneous data in a main memory device William A. Brant, Gary Neben 1997-04-08
5548711 Method and apparatus for fault tolerant fast writes through buffer dumping William A. Brant, Gary Neben, David C. Stallmo 1996-08-20
5469566 Flexible parity generation circuit for intermittently generating a parity for a plurality of data channels in a redundant array of storage units Gerald L. Hohenstein, Tin S. Tang, Richard Carmichael, William A. Brant 1995-11-21