Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8867301 | Semiconductor device having latency counter to control output timing of data and data processing system including the same | Taihei Shido | 2014-10-21 |
| 8862811 | Semiconductor device performing burst order control and data bus inversion | Taihei Shido, Chikara Kondo, Shinya Miyazaki | 2014-10-14 |
| 8773165 | Logic circuit performing exclusive or operation and data processing system including the same | Yuki Nakamura, Ronny Schneider | 2014-07-08 |
| 8400184 | Semiconductor device and level shift circuit using the same | Koji Kuroki | 2013-03-19 |
| 8385139 | Semiconductor device using plural internal operation voltages and data processing system using the same | — | 2013-02-26 |
| 8254153 | Semiconductor memory device having pad electrodes arranged in plural rows | Hiroki Fujisawa | 2012-08-28 |
| 8134882 | Semiconductor device including an anti-fuse element | — | 2012-03-13 |
| 7898884 | Semiconductor device and test method therefor | Atsushi Fujikawa | 2011-03-01 |
| 7835213 | Semiconductor memory device | Yasuji Koshikawa | 2010-11-16 |
| 7796456 | Semiconductor device | Yasuji Koshikawa, Masayuki Nakamura | 2010-09-14 |
| 7742356 | Semiconductor memory device having a refresh cycle changing circuit | Yasuji Koshikawa | 2010-06-22 |
| 7719906 | Semiconductor device | Naoya TANIMURA, Tomohiko Sato | 2010-05-18 |
| 7697360 | Semiconductor device | Yasuji Koshikawa | 2010-04-13 |
| 7652904 | Semiconductor memory device having plural memory cell arrays | Yasuji Koshikawa, Jun Suzuki | 2010-01-26 |
| 7551502 | Semiconductor device | Yasuji Koshikawa | 2009-06-23 |
| 7457176 | Semiconductor memory and memory module | — | 2008-11-25 |
| 7301844 | Semiconductor device | Yasuji Koshikawa | 2007-11-27 |
| 7215589 | Semiconductor memory device that requires refresh operations | Yasuji Koshikawa | 2007-05-08 |
| 7085187 | Semiconductor storage device | Yasuji Koshikawa | 2006-08-01 |
| 7082072 | Semiconductor memory device with refreshment control | Yasuji Koshikawa | 2006-07-25 |
| 7075852 | Semiconductor memory device of hierarchy word type and sub word driver circuit | Yasuji Koshikawa | 2006-07-11 |
| 6967878 | Redundancy architecture for repairing semiconductor memories | — | 2005-11-22 |
| 6867465 | Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device manufactured using the same | — | 2005-03-15 |
| 6845043 | Method of verifying a semiconductor integrated circuit apparatus, which can sufficiently evaluate a reliability of a non-destructive fuse module after it is assembled | — | 2005-01-18 |
| 6765815 | Semiconductor memory device having a main word-line layer disposed above a column selection line layer | Hiroki Fujisawa, Koji Arai | 2004-07-20 |