Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11775753 | Method for converting parser determined sentence parts to computer understanding state machine states that understand the sentence in connection with a computer understanding state machine | — | 2023-10-03 |
| 10236900 | Capacitive mismatch measurement | Steven Loveless, Yuguo Wang, Tathagata Chatterjee | 2019-03-19 |
| 7370042 | Method and system for the architecture and implementation of a conscious machine | — | 2008-05-06 |
| 6654774 | Generation of sign extended shifted numerical values | Atul Dhablania, Takumi Maruyama | 2003-11-25 |
| 6603333 | Method and apparatus for reduction of noise sensitivity in dynamic logic circuits | James Vinh, Pranjal Srivastava, Ajay Naini | 2003-08-05 |
| 6108763 | Simultaneous parity generating/reading circuit for massively parallel processing systems | — | 2000-08-22 |
| 5481749 | Shift register divided into a number of cells and a number of stages within each cell to permit bit and multiple bit shifting | — | 1996-01-02 |
| 5305462 | Mechanism for broadcasting data in a massively parallell array processing system | — | 1994-04-19 |
| 5276895 | Massively parallel array processing system | — | 1994-01-04 |
| 5230079 | Massively parallel array processing system with processors selectively accessing memory module locations using address in microword or in address register | — | 1993-07-20 |
| 5170484 | Massively parallel array processing system | — | 1992-12-08 |
| 5153521 | Broken wire detector for use in a massively parallel array processing system | — | 1992-10-06 |
| 5146606 | Systems for interconnecting and configuring plurality of memory elements by control of mode signals | — | 1992-09-08 |
| 4985832 | SIMD array processing system with routing networks having plurality of switching stages to transfer messages among processors | — | 1991-01-15 |