Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6757968 | Chip scale packaging on CTE matched printed wiring boards | Ching P. Lo, Daniel A. Huang | 2004-07-06 |
| 6560108 | Chip scale packaging on CTE matched printed wiring boards | Ching P. Lo, Daniel A. Huang | 2003-05-06 |
| 6109369 | Chip scale package | William R. Crumly, Robert Joseph Cochrane, Haim Feigenbaum, Eric Dean Jensen | 2000-08-29 |
| 6007669 | Layer to layer interconnect | William R. Crumly, Haim Feigenbaum, Eric Dean Jensen, John De Nuto | 1999-12-28 |