Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8587600 | System and method for cache-based compressed display data storage | Brett A. Tischler, Kenneth J. Kotlowski | 2013-11-19 |
| 7543008 | Apparatus and method for providing higher radix redundant digit lookup tables for recoding and compressing function values | David W. Matula | 2009-06-02 |
| 7346642 | Arithmetic processor utilizing multi-table look up to obtain reciprocal operands | David W. Matula | 2008-03-18 |
| 7243216 | Apparatus and method for updating a status register in an out of order execution pipeline based on most recently issued instruction information | David S. Oliver | 2007-07-10 |
| 7243217 | Floating point unit with variable speed execution pipeline and method of operation | David S. Oliver | 2007-07-10 |
| RE39385 | Method and apparatus for performing mathematical functions using polynomial approximation and a rectangular aspect ratio multiplier | Thomas B. Brightman, Warren E. Ferguson | 2006-11-07 |
| 6976153 | Floating point unit with try-again reservation station and method of operation | David S. Oliver | 2005-12-13 |
| 6938062 | Apparatus and method for providing higher radix redundant digit lookup tables for recoding and compressing function values | David W. Matula | 2005-08-30 |
| 6598136 | Data transfer with highly granular cacheability control between memory and a scratchpad area | Forrest E. Norrod, Christopher G. Wilcox, Brian Dennis Falardeau | 2003-07-22 |
| 6594755 | System and method for interleaved execution of multiple independent threads | David W. Nuechterlein | 2003-07-15 |
| 6115730 | Reloadable floating point unit | Atul Dhablania | 2000-09-05 |
| 5801720 | Data transfer from a graphics subsystem to system memory | Forrest E. Norrod, Christopher G. Wilcox, Brian Dennis Falardeau, Sameer Nanavati | 1998-09-01 |
| 5659495 | Numeric processor including a multiply-add circuit for computing a succession of product sums using redundant values without conversion to nonredundant format | David W. Matula | 1997-08-19 |
| 5475630 | Method and apparatus for performing prescaled division | David W. Matula | 1995-12-12 |
| 5307303 | Method and apparatus for performing division using a rectangular aspect ratio multiplier | David W. Matula | 1994-04-26 |
| 5268858 | Method and apparatus for negating an operand | — | 1993-12-07 |
| 5184318 | Rectangular array signed digit multiplier | David W. Matula | 1993-02-02 |
| 5159566 | Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier | Thomas B. Brightman, David W. Matula | 1992-10-27 |
| 5144576 | Signed digit multiplier | David W. Matula | 1992-09-01 |
| 5060182 | Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier | Thomas B. Brightman, David W. Matula | 1991-10-22 |
| 4649471 | Address-controlled automatic bus arbitration and address modification | Alan D. Gant, Parveen Kumar Gupta, Isadore S. Ferson | 1987-03-10 |
| 4626985 | Single-chip microcomputer with internal time-multiplexed address/data/interrupt bus | — | 1986-12-02 |
| 4595845 | Non-overlapping clock CMOS circuit with two threshold voltages | — | 1986-06-17 |
| 4564920 | Multiplier with hybrid register | — | 1986-01-14 |
| 4451885 | Bit operation method and circuit for microcomputer | Isadore S. Gerson | 1984-05-29 |