Issued Patents All Time
Showing 26–50 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9812566 | LDMOS device having a low angle sloped oxide | Sharon Levin, David Mistele | 2017-11-07 |
| 9806174 | Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structure | Sharon Levin, Noel Berkovitch | 2017-10-31 |
| 9741803 | Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region | Fredrick B. Jenne, Krishnaswamy Ramkumar | 2017-08-22 |
| 9716153 | Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region | Fredrick B. Jenne, Krishnaswamy Ramkumar | 2017-07-25 |
| 9553175 | SONOS type stacks for nonvolatile charge trap memory devices and methods to form the same | Helmut Puchner, Igor Polishchuk | 2017-01-24 |
| 9502543 | Method of manufacturing for memory transistor with multiple charge storing layers and a high work function gate electrode | Igor Polishchuk, Krishnaswamy Ramkumar | 2016-11-22 |
| 9484454 | Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structure | Sharon Levin, Noel Berkovitch | 2016-11-01 |
| 9449831 | Oxide-nitride-oxide stack having multiple oxynitride layers | Krishnaswamy Ramkumar, Fredrick B. Jenne, Sam Geha | 2016-09-20 |
| 9431549 | Nonvolatile charge trap memory device having a high dielectric constant blocking region | Igor Polishchuk, Krishnaswamy Ramkumar | 2016-08-30 |
| 9355849 | Oxide-nitride-oxide stack having multiple oxynitride layers | Krishnaswamy Ramkumar, Fredrick B. Jenne, Sam Geha | 2016-05-31 |
| 9349877 | Nitridation oxidation of tunneling layer for improved SONOS speed and retention | Krishnaswamy Ramkumar, Frederick B. Jenne | 2016-05-24 |
| 9349824 | Oxide-nitride-oxide stack having multiple oxynitride layers | Krishnaswamy Ramkumar, Frederick B. Jenne, Sam Geha | 2016-05-24 |
| 9306025 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Igor Polishchuk, Krishnaswamy Ramkumar | 2016-04-05 |
| 9299568 | SONOS ONO stack scaling | Fredrick B. Jenne, Krishnaswamy Ramkumar | 2016-03-29 |
| 9105712 | Double RESURF LDMOS with separately patterned P+ and N+ buried layers formed by shared mask | Jolly Gurvinder, Sharon Levin | 2015-08-11 |
| 9105740 | SONOS type stacks for nonvolatile changetrap memory devices and methods to form the same | Helmut Puchner, Igor Polishchuk | 2015-08-11 |
| 9093318 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Igor Polishchuk, Krishnaswamy Ramkumar | 2015-07-28 |
| 8993453 | Method of fabricating a nonvolatile charge trap memory device | Krishnaswamy Ramkumar, Jeong Soo Byun | 2015-03-31 |
| 8940645 | Radical oxidation process for fabricating a nonvolatile charge trap memory device | Krishnaswamy Ramkumar, Jeong Soo Byun | 2015-01-27 |
| 8871595 | Integration of non-volatile charge trap memory devices and logic CMOS devices | Krishnaswamy Ramkumar, Fredrick B. Jenne | 2014-10-28 |
| 8859374 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Igor Polishchuk, Krishnaswamy Ramkumar | 2014-10-14 |
| 8860122 | Nonvolatile charge trap memory device having a high dielectric constant blocking region | Igor Polishchuk | 2014-10-14 |
| 8691648 | Methods for fabricating semiconductor memory with process induced strain | Igor Polishchuk, Krishnaswamy Ramkumar, Jeong Soo Byun | 2014-04-08 |
| 8679927 | Integration of non-volatile charge trap memory devices and logic CMOS devices | Krishnaswamy Ramkumar, Fredrick B. Jenne | 2014-03-25 |
| 8680601 | Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region | Fredrick B. Jenne, Krishnaswamy Ramkumar | 2014-03-25 |