Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6990618 | Boundary scan register for differential chip core | Navaz Lulla, Roger Bettman | 2006-01-24 |
| 6687864 | Macro-cell flip-flop with scan-in input | Anup Nayak, Sanjeev K. Maheshwari | 2004-02-03 |
| 6567970 | PLD configuration architecture | Anup Nayak, Navaz Lulla, Rajiv Nema | 2003-05-20 |
| 6369609 | Degenerate network for PLD and plane | Anup Nayak | 2002-04-09 |
| 6351139 | Configuration bit read/write data shift register | Anup Nayak | 2002-02-26 |
| 6351146 | Multilevel circuit implementation for a tristate bus | Anup Nayak | 2002-02-26 |