KF

Keith A. Ford

Cypress Semiconductor: 12 patents #152 of 1,852Top 9%
IBM: 1 patents #44,794 of 70,183Top 65%
Overall (All Time): #383,586 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9038004 Automated integrated circuit design documentation Rohit Shetty, Sebastian T. Ventrone 2015-05-19
6674682 Architecture, method(s) and circuitry for low power memories Iulian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, John J. Silver, Danny L. Rose 2004-01-06
6662315 Parallel test in asynchronous memory with single-ended output path Iulian C. Gradinariu, John J. Silver, Sean B. Mulholland 2003-12-09
6629185 Architecture, circuitry and method of transferring data into and/or out of an interdigitated memory array John J. Silver, Iulian C. Gradinariu, Sean B. Mulholland 2003-09-30
6535437 Block redundancy in ultra low power memory circuits John J. Silver, Iulian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, Danny L. Rose 2003-03-18
6530040 Parallel test in asynchronous memory with single-ended output path Iulian C. Gradinariu, John J. Silver, Sean B. Mulholland 2003-03-04
6493283 Architecture, method (s) and circuitry for low power memories Iulian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, John J. Silver, Danny L. Rose 2002-12-10
6323701 Scheme for reducing leakage current in an input buffer Iulian C. Gradinariu 2001-11-27
6324107 Parallel test for asynchronous memory James D. Allan, John J. Silver 2001-11-27
6249464 Block redundancy in ultra low power memory circuits John J. Silver, Julian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, Danny L. Rose 2001-06-19
6163495 Architecture, method(s) and circuitry for low power memories Iulian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, John J. Silver, Danny L. Rose 2000-12-19
6111800 Parallel test for asynchronous memory James D. Allan, John J. Silver 2000-08-29
5675542 Memory bit-line pull-up scheme 1997-10-07