Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8339188 | Floating gate reference for sleep/hibernate regulator | Harold Kutz, Gary Peter Moscaluk | 2012-12-25 |
| 7053662 | Method and circuit for high speed transmission gate logic | Bogdan I. Georgescu | 2006-05-30 |
| 6674682 | Architecture, method(s) and circuitry for low power memories | Keith A. Ford, Iulian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, Danny L. Rose | 2004-01-06 |
| 6662315 | Parallel test in asynchronous memory with single-ended output path | Iulian C. Gradinariu, Keith A. Ford, Sean B. Mulholland | 2003-12-09 |
| 6633189 | Circuit to provide a time delay | Julian C. Gradinariu | 2003-10-14 |
| 6629185 | Architecture, circuitry and method of transferring data into and/or out of an interdigitated memory array | Iulian C. Gradinariu, Keith A. Ford, Sean B. Mulholland | 2003-09-30 |
| 6535437 | Block redundancy in ultra low power memory circuits | Iulian C. Gradinariu, Bogdan I. Georgescu, Keith A. Ford, Sean B. Mulholland, Danny L. Rose | 2003-03-18 |
| 6530040 | Parallel test in asynchronous memory with single-ended output path | Iulian C. Gradinariu, Keith A. Ford, Sean B. Mulholland | 2003-03-04 |
| 6493283 | Architecture, method (s) and circuitry for low power memories | Keith A. Ford, Iulian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, Danny L. Rose | 2002-12-10 |
| 6324107 | Parallel test for asynchronous memory | James D. Allan, Keith A. Ford | 2001-11-27 |
| 6249464 | Block redundancy in ultra low power memory circuits | Julian C. Gradinariu, Bogdan I. Georgescu, Keith A. Ford, Sean B. Mulholland, Danny L. Rose | 2001-06-19 |
| 6163495 | Architecture, method(s) and circuitry for low power memories | Keith A. Ford, Iulian C. Gradinariu, Bogdan I. Georgescu, Sean B. Mulholland, Danny L. Rose | 2000-12-19 |
| 6111800 | Parallel test for asynchronous memory | James D. Allan, Keith A. Ford | 2000-08-29 |