ES

Ende Shan

Cypress Semiconductor: 7 patents #267 of 1,852Top 15%
VS Vitesse Semiconductor: 1 patents #46 of 124Top 40%
Overall (All Time): #662,076 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6906421 Method of forming a low resistivity Ti-containing interconnect and semiconductor device comprising the same Gorley Lau, Anthony Chung 2005-06-14
6756302 Low temperature metallization process Gorley Lau, Sam Geha 2004-06-29
6746950 Low temperature aluminum planarization process 2004-06-08
6534398 Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit Gorley Lau, Sam Geha 2003-03-18
6187667 Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit Gorley Lau, Sam Geha 2001-02-13
6156645 Method of forming a metal layer on a substrate, including formation of wetting layer at a high temperature Sam Geha 2000-12-05
6140228 Low temperature metallization process Gorley Lau, Sam Geha 2000-10-31
5968851 Controlled isotropic etch process and method of forming an opening in a dielectric layer Sam Geha 1999-10-19