Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5353423 | Memory controller for use with write-back cache system and multiple bus masters coupled to multiple buses | Gary W. Thome | 1994-10-04 |
| 5289584 | Memory system with FIFO data input | Gary W. Thome | 1994-02-22 |
| 5247654 | Minimum reset time hold circuit for delaying the completion of a second and complementary operation | Roy E. Thoma, III | 1993-09-21 |
| 5241681 | Computer system having an internal cach microprocessor slowdown circuit providing an external address signal | Roy E. Thoma, III, John S. Thayer | 1993-08-31 |
| 5126910 | Modular computer memory circuit board | James A. Windsor, Roy E. Thoma, III, James P. Paschal, Francis A. Felcman | 1992-06-30 |