MT

Michael R. Trocino

CI Coherent Logix, Incorporated: 29 patents #4 of 50Top 8%
HL Hyperx Logic: 2 patents #2 of 9Top 25%
🗺 Texas: #3,693 of 125,132 inventorsTop 3%
Overall (All Time): #114,774 of 4,157,543Top 3%
31
Patents All Time

Issued Patents All Time

Showing 1–25 of 31 patents

Patent #TitleCo-InventorsDate
12306773 Multiprocessor system with improved secondary interconnection network Carl S. Dobbs 2025-05-20
12197970 Processing system with interspersed processors DMA-FIFO Carl S. Dobbs, Keith M. Bindloss 2025-01-14
11900124 Memory-network processor with programmable optimizations Michael B. Doerr, Carl S. Dobbs, Michael B. Solka, Kenneth R. Faulkner, Keith M. Bindloss +3 more 2024-02-13
11829320 Memory network processor Carl S. Dobbs, Keith M. Bindloss, Kenneth R. Faulkner, Alex E. Icaza, Frederick Rush +1 more 2023-11-28
11755504 Multiprocessor system with improved secondary interconnection network Carl S. Dobbs 2023-09-12
11550750 Memory network processor Carl S. Dobbs, Keith M. Bindloss, Kenneth R. Faulkner, Alex E. Icaza, Frederick Rush +1 more 2023-01-10
11544072 Memory-network processor with programmable optimizations Michael B. Doerr, Carl S. Dobbs, Michael B. Solka, Kenneth R. Faulkner, Keith M. Bindloss +3 more 2023-01-03
11030023 Processing system with interspersed processors DMA-FIFO Carl S. Dobbs, Keith M. Bindloss 2021-06-08
11016779 Memory-network processor with programmable optimizations Michael B. Doerr, Carl S. Dobbs, Michael B. Solka, Kenneth R. Faulkner, Keith M. Bindloss +3 more 2021-05-25
10838787 Processing system with interspersed processors with multi-layer interconnect Carl S. Dobbs, Michael B. Solka 2020-11-17
10747689 Multiprocessor system with improved secondary interconnection network Carl S. Dobbs 2020-08-18
10747709 Memory network processor Carl S. Dobbs, Keith M. Bindloss, Kenneth R. Faulkner, Alex E. Icaza, Frederick Rush +1 more 2020-08-18
10685143 Secure boot sequence for selectively disabling configurable communication paths of a multiprocessor fabric Michael B. Doerr, Carl S. Dobbs, Michael B. Solka, David A. Gibson 2020-06-16
10521285 Processing system with interspersed processors with multi-layer interconnection Carl S. Dobbs, Michael B. Solka 2019-12-31
10185672 Multiprocessor system with improved secondary interconnection network Carl S. Dobbs 2019-01-22
10185608 Processing system with interspersed processors with multi-layer interconnection Carl S. Dobbs, Michael B. Solka 2019-01-22
10007806 Secure boot sequence for selectively disabling configurable communication paths of a multiprocessor fabric Michael B. Doerr, Carl S. Dobbs, Michael B. Solka, David A. Gibson 2018-06-26
10007293 Clock distribution network for multi-frequency multi-processor systems Carl S. Dobbs, Kenneth R. Faulkner, Christopher L. Schreppel 2018-06-26
9990241 Processing system with interspersed processors with multi-layer interconnection Carl S. Dobbs, Michael B. Solka 2018-06-05
9720867 Processing system with interspersed processors with multi-layer interconnection Carl S. Dobbs, Michael B. Solka 2017-08-01
9612984 Multiprocessor system with improved secondary interconnection network Carl S. Dobbs 2017-04-04
9450590 Clock distribution network for multi-frequency multi-processor systems Carl S. Dobbs, Kenneth R. Faulkner, Christopher L. Schreppel 2016-09-20
9430369 Memory-network processor with programmable optimizations Michael B. Doerr, Carl S. Dobbs, Michael B. Solka, Kenneth R. Faulkner, Keith M. Bindloss +3 more 2016-08-30
9430422 Processing system with interspersed processors with multi-layer interconnect Carl S. Dobbs, Michael B. Solka 2016-08-30
9424441 Multiprocessor fabric having configurable communication that is selectively disabled for secure processing Michael B. Doerr, Carl S. Dobbs, Michael B. Solka, David A. Gibson 2016-08-23