Issued Patents All Time
Showing 126–150 of 160 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6296550 | Scalable multi-pad design for improved CMP process | Erzhuang Liu | 2001-10-02 |
| 6297106 | Transistors with low overlap capacitance | Erzhuang Lui | 2001-10-02 |
| 6291307 | Method and structure to make planar analog capacitor on the top of a STI structure | Shao-fu Sanford Chu, Wang Yimin, Kai Shao | 2001-09-18 |
| 6284581 | Integration of bipolar and CMOS devices for sub-0.1 micrometer transistors | Erzhuang Liu | 2001-09-04 |
| 6265280 | Method for manufacturing a cylindrical semiconductor capacitor | — | 2001-07-24 |
| 6200905 | Method to form sidewall polysilicon capacitors | — | 2001-03-13 |
| 6159781 | Way to fabricate the self-aligned T-shape gate to reduce gate resistivity | Erzhuang Liu | 2000-12-12 |
| 6117654 | Nucleic acid molecules encoding Tango-77-polypeptides | — | 2000-09-12 |
| 6043086 | Neurotactin and uses therefor | — | 2000-03-28 |
| 6013257 | Neurotactin and uses therefor | — | 2000-01-11 |
| 5989909 | Huchordin and uses thereof | — | 1999-11-23 |
| 5979671 | Electrically operated elevatable clothes drying assembly | Te-Fu Yeh | 1999-11-09 |
| 5973346 | Low-profile shallow trench double polysilicon capacitor | — | 1999-10-26 |
| 5897364 | Method of forming N- and P-channel transistors with shallow junctions | — | 1999-04-27 |
| 5869396 | Method for forming a polycide gate electrode | Harianto Wong | 1999-02-09 |
| 5858832 | Method for forming a high areal capacitance planar capacitor | — | 1999-01-12 |
| 5831319 | Conductive spacer lightly doped drain (LDD) for hot carrier effect (HCE) control | — | 1998-11-03 |
| 5813664 | Back-end capacitor with high unit capacitance | — | 1998-09-29 |
| 5814863 | Substrate with gate electrode polysilicon/gate oxide stack covered with fluorinated silicon oxide layer and fluorinated corners of gate oxide layer | — | 1998-09-29 |
| 5760435 | Use of spacers as floating gates in EEPROM with doubled storage efficiency | — | 1998-06-02 |
| 5750435 | Method for minimizing the hot carrier effect in N-MOSFET devices | — | 1998-05-12 |
| 5744853 | Three dimensional polysilicon capacitor for high density integrated circuit applications | Elgin Quek | 1998-04-28 |
| 5742088 | Process having high tolerance to buried contact mask misalignment by using a PSG spacer | Lap Chan, Ravi Sundaresan | 1998-04-21 |
| 5691252 | Method of making low profile shallow trench double polysilicon capacitor | — | 1997-11-25 |
| 5672544 | Method for reducing silicided poly gate resistance for very small transistors | — | 1997-09-30 |