Issued Patents All Time
Showing 76–80 of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6760337 | Integrated circuit that processes communication packets with scheduler circuitry having multiple priority levels | Joseph B. Tompkins, Daniel J. Lussier | 2004-07-06 |
| 6754223 | Integrated circuit that processes communication packets with co-processor circuitry to determine a prioritized processing order for a core processor | Daniel J. Lussier, Joseph B. Tompkins | 2004-06-22 |
| 6324616 | Dynamically inhibiting competing resource requesters in favor of above threshold usage requester to reduce response delay | George Z. Chrysos | 2001-11-27 |
| 6233645 | Dynamically disabling speculative prefetch when high priority demand fetch opportunity use is high | George Z. Chrysos | 2001-05-15 |
| 6189083 | Method and apparatus for accessing a cache memory utilization distingushing bit RAMs | — | 2001-02-13 |