WH

Walter E. Hartong

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
📍 Isen, DE: #7 of 27 inventorsTop 30%
Overall (All Time): #846,868 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
9852258 Method and system for implementing a requirements driven closed loop verification cockpit for analog circuits Paul C. Foster, Jinduo Sun 2017-12-26
8943450 Model based analog block coverage system Paul C. Foster, Jinduo Sun 2015-01-27
8554530 Methods and systems for property assertion in circuit simulation Donald J. O'Riordan, Prabal Kanti Bhattacharya, Richard J. O'Donovan 2013-10-08
8423934 Model validation cockpit Paul C. Foster, Tina Najibi, T. Martin O'Leary 2013-04-16
8401828 Methods and systems for analog object fetch in mixed-signal simulation Prabal Kanti Bhattacharya, Timothy Martin O'Leary, William S. Cranston 2013-03-19
8327303 Template-based real number behavioral modeling Paul C. Foster, T. Martin O'Leary 2012-12-04