Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7512850 | Checkpointing user design states in a configurable IC | Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig | 2009-03-31 |
| 7243328 | Method and apparatus for representing items in a design layout | Etienne Jacques | 2007-07-10 |
| 7155440 | Hierarchical data processing | Steven Teig | 2006-12-26 |
| 7080339 | Plane representation of wiring in a design layout | Etienne Jacques | 2006-07-18 |
| 7065731 | Removal of acute angles in a design layout | Etienne Jacques | 2006-06-20 |
| 6996793 | Methods and apparatus for storing and manipulating diagonal interconnect lines of a multidimensional integrated circuit design | Steven Teig | 2006-02-07 |
| 6959304 | Method and apparatus for representing multidimensional data | Steven Teig, Andrew Siegel | 2005-10-25 |
| 6877013 | Methods and apparatus for extracting capacitances exerted on diagonal interconnect lines in an integrated circuit design | Steven Teig | 2005-04-05 |
| 6701306 | Methods and apparatus for manipulating polygons in a multidimensional space | Steven Teig | 2004-03-02 |
| 6625611 | Method and apparatus for representing multidimensional data | Steven Teig, Andrew Siegel | 2003-09-23 |