SC

Swapnajit Chakraborti

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
📍 Noida, IN: #149 of 795 inventorsTop 20%
Overall (All Time): #1,553,739 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
8214782 Systems for total coverage analysis and ranking of circuit designs Sandeep Pagey, Boris Gommershtadt, Yael Duek-Golan 2012-07-03
7886242 Systems, methods, and apparatus for total coverage analysis and ranking of circuit designs Sandeep Pagey, Boris Gommershtadt, Yael Duek-Golan 2011-02-08
7031898 Mechanism for recognizing and abstracting memory structures Alok Jain, Erich Marschner 2006-04-18