SJ

Sahil Jain

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
NU Nxp Usa: 1 patents #1,089 of 2,066Top 55%
📍 San Jose, CA: #12,320 of 32,062 inventorsTop 40%
🗺 California: #124,610 of 386,348 inventorsTop 35%
Overall (All Time): #1,142,233 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
11320485 Scan wrapper architecture for system-on-chip Akhil Garg 2022-05-03
10747922 Test circuitry with annularly arranged compressor and decompressor elements Akhil Garg, Vivek Chickermane 2020-08-18
10222417 Securing access to integrated circuit scan mode and data Akhil Garg, Dale Edward Meehl 2019-03-05
9563355 Method and system of data entry on a virtual interface Rajeev Jain, Sagar Jain, Sumit Jain 2017-02-07