Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11868241 | Method and system for optimizing a verification test regression | Yael Kinderman, Yosinori Watanabe, Ido Avraham | 2024-01-09 |
| 10607039 | Constrained metric optimization of a system on chip | Yael Kinderman, Shlomi Uziel, Ido Avraham, Yosinori Watanabe | 2020-03-31 |
| 10423741 | Constrained metric verification analysis of a system on chip | Yosinori Watanabe, Yael Kinderman, Shlomi Uziel, Ido Avraham | 2019-09-24 |
| 10409939 | Statistical sensitivity analyzer | Yosinori Watanabe | 2019-09-10 |
| 10140202 | Source code annotation for a system on chip | Yosinori Watanabe | 2018-11-27 |